Advanced wireless communications products demand integrated circuit technologies with high performance, high levels of system integration, low power and low cost. For wireless applications up to several GHz, silicon BiCMOS technology is uniquely suited to meet these requirements. Of critical important to RF design is the availability of high quality passive components. In particular, it is desirable to have implanted thin film resistors that have a low temperature coefficient of resistance. Unfortunately, existing techniques for polysilicon thin film resistors generally result in thin film resistors with relatively large temperature coefficients of resistance.
The invention comprises a polysilicon thin film low temperature coefficient resistor and a method for the resistor""s fabrication that overcome the coefficient of resistance problem of the prior art, while at the same time eliminating steps from the BiCMOS fabrication process, optimizing bipolar design tradeoffs, and improving passive device isolation. The low temperature coefficient of resistance resistor (TCRL) is formed on a layer of insulation, typically silicon dioxide or silicon nitride. The layer comprises polysilicon that has a relatively high concentration of dopants of one or more species, and has a substantial amount of unannealed implant damage. Contrary to prior art methods, the implanted resistor is annealed less than typical prior art implanted resistors in order to leave some planned unannealed damage in the resistor. The planned damage gives the TCRL a higher resistance without increasing its temperature coefficient. Thus, even though the temperature may increase, the relative value of the resistance remains the same. As such, the resistor is more precise than others produced with current methods, and may be used where precision requirements for high quality RF devices apply. A process for fabrication of the resistor is used which combines separate spacer oxide depositions, provides buried layers having different diffusion coefficients, incorporates dual dielectric trench sidewalls that double as a polish stop, supplies a spacer structure that controls precisely the emitter-base dimension, and integrates bipolar and CMOS devices with negligible compromise to the features of either type.